I had find any way to solve this problem and it's realy working, but I don't know why ? Before the call to the flash memory writing function I set the master clock dividet to 2, then return to the previous state this way: UCSCTL5 |= DIVM0; FCTL3 = FWKEY; FCTL1 = FWKEY + WRT; __data20_write_char(addr,byte); FCTL3 = FWKEY; FCTL1 = FWKEY + LOCK; UCSCTL5 &= ~DIVM0;
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