Technical documentation has all such answers: 1. From the datasheet: "Auxiliary clock (ACLK), sourced either from a 32768-Hz watch crystal or the internal LF oscillator." 2. ACLK cannot be sourced from high frequency clocks, but there is a synchronization mechanism between ACLK and MCLK/SMCLK to eliminate race condition, and it do not affect system reset. The watchdog timer is calling system reset when is overflowed.
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