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Forum Post: What effects does debug under CCSv5 with SBW connections have on interrupt response?

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My MSP430F5172 project is interrupt-intensive (UART sending 400 bytes at 250K, 30 times/second); processor clock of 4 MHz. Running in CCS Debug with SBW connection, UART data appears corrupted (missing an unknown # of bytes > - I lack instrumentation to tell for sure). Disconnected from SBW and being self-powered, behavior is as desired and rock-solid. Does SBW interfere with interrupt processing, and would JTAG be any better? I'd sooner not sacrifice I/O's to use JTAG, but will if I'd have better results Thanks for thoughts Doug

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