Thanks for sharing these. Could you try making the memory locations independent for each project (as shown below)? Bootloader Project Linker File MEMORY { BOOT (RX) : origin = 0x00000000, length = 0x00007FB0 BOOTCRC (RX) : origin = 0x00007FB0, length = 0x00000050 INFO (RX) : origin = 0x00200000, length = 0x00004000 #ifdef __TI_COMPILER_VERSION__ #if __TI_COMPILER_VERSION__ >= 15009000 ALIAS { SRAM_CODE (RWX): origin = 0x01000000 SRAM_DATA (RW) : origin = 0x20000000 } length = 0x00010000 #else /* Hint: If the user wants to use ram functions, please observe that SRAM_CODE */ /* and SRAM_DATA memory areas are overlapping. You need to take measures to separate */ /* data from code in RAM. This is only valid for Compiler version earlier than 15.09.0.STS.*/ SRAM_CODE (RWX): origin = 0x01000000, length = 0x00010000 SRAM_DATA (RW) : origin = 0x20000000, length = 0x00010000 #endif #endif } Main Project Linker File MEMORY { MAIN (RX) : origin = 0x00008000, length = 0x00037F80 MAINCRC (RX) : origin = 0x0003FF80, length = 0x00000080 INFO (RX) : origin = 0x00200000, length = 0x00004000 #ifdef __TI_COMPILER_VERSION__ #if __TI_COMPILER_VERSION__ >= 15009000 ALIAS { SRAM_CODE (RWX): origin = 0x01000000 SRAM_DATA (RW) : origin = 0x20000000 } length = 0x00010000 #else /* Hint: If the user wants to use ram functions, please observe that SRAM_CODE */ /* and SRAM_DATA memory areas are overlapping. You need to take measures to separate */ /* data from code in RAM. This is only valid for Compiler version earlier than 15.09.0.STS.*/ SRAM_CODE (RWX): origin = 0x01000000, length = 0x00010000 SRAM_DATA (RW) : origin = 0x20000000, length = 0x00010000 #endif #endif } Also, could you change your Erase Configuration to "Erase and download necessary segments only" for both projects? Please let me know if this resolves the issue. If not, we'll dig deeper. You may be able to compare the binaries for each project and see if there is some memory overlap occurring. Regards, James MSP Customer Applications
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