Hi Ryan, First off, here is the Clock setup (in case you see some error): /* Configure the clock */ /* DCO running at 16MHz */ /* HFXT is 8MHz */ /* LFXT is 32.768kHz */ /* ACLK running on LFXT 32768Hz */ /* SMCLK running on HFXT 8MHz */ /* MCLK running on DCOCLK, 16/2MHz */ /* LFXT Driver on low power */ /* Add wait states to FRAM to keep at 8MHz */ FRCTL0 = FRCTLPW | NWAITS_2; /* Unlock CS Register */ CSCTL0_H = CSKEY >> 8; CSCTL1 = DCOFSEL_4 | DCORSEL; // Set DCO to 8MHz CSCTL2 = SELA__LFXTCLK | SELS__HFXTCLK | SELM__DCOCLK; CSCTL3 = DIVA__1 | DIVS__1 | DIVM__1; // Set all dividers to 1 CSCTL4 |= LFXTDRIVE_3 | HFXTDRIVE_3; CSCTL4 &= ~(LFXTOFF | HFXTOFF); do { CSCTL5 &= ~(LFXTOFFG | HFXTOFFG); // Clear XT1 and XT2 fault flag SFRIFG1 &= ~OFIFG; }while (SFRIFG1&OFIFG); // Test oscillator fault flag CSCTL0_H = 0; // Lock CS registers Next is my SPI setup: /* Put UCA0 In Reset */ UCA0CTLW0 = UCSWRST; /* Put UCA0 in 3-Pin, 8-Bit, Synchronous SPI Master Mode */ /* No Modulation */ UCA0CTLW0 |= UCMSB | UCMST | UCMODE_0 | UCSYNC | UCCKPH; UCA0CTLW0 |= UCSSEL__SMCLK; UCA0BR0 = 0x50; UCA0BR1 = 0; UCA0MCTLW = 0; /* Initialize USCI State Machine */ UCA0CTLW0 &= ~UCSWRST; UCA0IE |= UCTXIE | UCRXIE; Now the screenshots. First set is one sample with the debugger attached. There is a capture of the full sample, then the OCR request (Data following MOSI 0x7A should be MISO 0xC0, not 0x80), finally a capture of a block read request (MOSI 0x51 should be followed with a MISO 0x00) Second set is one sample with the debugger removed. This time I receive a 0xC0 for the first byte of the OCR, and a 0x00 for the Read Request. Interesting note: There has been two times when I have changed the clock frequency that the SD card has initialized correctly with the debugger attached. It was immediately after downloading, but when I restart the program from the debugger I cannot recreate. nor does power cycling and re-downloading. Thanks for the help. -Matt
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