Hi MAtt, Out of curiosity, why the increased wait states? If you are only getting up to 8 MHz then I'd recommend using no wait states, a max of NWAITS_1 for 16 MHz. But I don't think this will affect your issue and the rest of your initialization code looks fine. In the third screenshot, it can make sense that the debugger overloading the CPU could cause a 9-bit delay (0x0A to 0x05 shifted one byte over) on the MOSI line, but the 0xC0 OCR register value with no debugger vs 0x80 with debugger is another clue that calls the system's power supply capabilities into question. When the debugger is connected, the card power up status bit is low to indicate that the card has not finished the power up routine. This suggests either an invalid voltage range or the need to wait longer for the card to properly power up. Is the debugger providing power to the system when connected? I'm thinking that it isn't and that JTAG pin 4 is connected so that the FET tool uses the system's voltage level from a power supply, but the FET tool may be overloading the power supply. Your notes at the end of the last post are ever-more a reason to investigate the Vcc lines and see if there is a difference between the two operating states. Maybe with the debugger connected a longer delay is required to get the SD card's power up routine completed? Regards, Ryan
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