[quote user="A S"]SPI cannot output a continuous stream of multiple bytes back to back. There is some amount of delay between each byte sent.[/quote] I'm fairly certain that this isn't true. You get the TX interrupt as soon as the byte is transferred from the buffer register to the shift register. This means you have the 8 bit cycles worth of time to get the next byte loaded. If you are running the SPI at the MCLK rate, then you only have 8 clock cycles to process the interrupt via software, and it is true you can't do that fast enough and will get gaps between the bytes. But - if you program the DMA engine to move the data for you, you can get continuous data movement out the SPI without delay between the bytes. This method would be 8x more efficient than DMA-ing to the port register, because you get 4 complete toggles per DMA instead of 1/2 a toggle per DMA (for same MCLK rate). Allows your software some CPU cycles to do stuff concurrently to the pulse generation. EDIT: Fixed 2nd paragraph number of cycles.
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