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Forum Post: MSP430F5636 Flash Banks

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Can you please tell me if their is any blocking behavior during the erase OR write procedure on MSP430F5636 when executing code from the alternate flash bank. Does CPU activity at any point stall in Bank 0 during either erase OR write on Bank 1 and vice versa. I appreciate that ISR will be compromised while erasing Bank 0 containing the vector table.

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