Hello Cristian, Data can only be transferred when FSYNC is low, I assume this is controlled by CS_PIN/P4.0. Serial data is shifted into the input shift register of the device on the falling edges of SCLK. Your initialization however sets the SPI for EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_HIGH and EUSCI_B_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT, which means that the data is changed on a high-to-low transition and captured on a low-to-high transition. Your SPI settings are therefore out-of-phase, you need to either change the clock polarity to inactive low or swap the phase select settings in order to communicate with the AD9833. Regards, Ryan
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