Forum Post: RE: MSP432P401R LaunchPad 14bit ADC 1Msps using DMA looks 3% slower than expected. Why?

Thank you very much for the suggestion. I added the HFXT program below. MCLK is now 48.00 MHz all right. But, situation is almost the same. About 3% slower ADC14 sampling is still happening. What should I do now? /* output clock to port on 2016-10-27 */ P4->DIR |= BIT3 | BIT4; P4->SEL0 |=BIT3 | BIT4; // Output MCLK P4->SEL1 &= ~(BIT3 | BIT4); P7->DIR |= BIT0; // Port7.0 output for SMCLK P7->SEL0 |=BIT0; P7->SEL1 &= ~BIT0; /* Configure HFXT to use 48MHz crystal */ PJ->SEL0 |= BIT2 | BIT3; // Configure PJ.2/3 for HFXT function PJ->SEL1 &= ~(BIT2 | BIT3); CS->KEY = CS_KEY_VAL ; // Unlock CS module for register access CS->CTL2 |= CS_CTL2_HFXT_EN | CS_CTL2_HFXTFREQ_6 | CS_CTL2_HFXTDRIVE; while(CS->IFG & CS_IFG_HFXTIFG) CS->CLRIFG |= CS_CLRIFG_CLR_HFXTIFG; CS->KEY = 0; // Lock CS module