hi to all, i am using msp430f5438a microcontroller in that i am using adc12_a with repeat single channel mode...... i am attaching the code below.... i am new to microcontroller ... if there is any mistake.. please forgive me.... thank you.... in that output i have found some missing codes...... is there any mistake in my program.. please let me know... i am using a default clock frequency and i think it will be around 1MHZ.... with that how can i calculate sampling time.... my ADC12SHT0_0(4 clk cycles) can you tell me samping time for this values.... and let me know it is sufficient or not ..... no means why?? please let me know.... thank you in advance... #include " msp430f5438A .h" #include int main(void) { WDTCTL = WDTPW+WDTHOLD; // Stop watchdog timer P6SEL |= 0x80; // Enable A/D channel A0 PBDIR = PBDIR | 0xFFFF; REFCTL0 = REFMSTR + REFON + REFVSEL_2 + REFTCOFF; /* Initialize ADC12_A */ ADC12CTL0 = ADC12ON+ADC12SHT0_8+ADC12MSC; // Turn on ADC12, set sampling time // set multiple sample conversion ADC12CTL1 = ADC12CSTARTADD_7 + ADC12SHP+ ADC12DIV_0 + ADC12SSEL_3 + ADC12CONSEQ_2; ADC12CTL2 = ADC12RES_2; ADC12MCTL7 = ADC12SREF_1 + ADC12INCH_7; ADC12IE = ADC12IE7; // Enable ADC12IFG.0 //__delay_cycles(75); // 75 us delay @ ~1MHz while(ADC12CTL1 & ADC12BUSY); ADC12CTL0 |= ADC12ENC; // Enable conversions ADC12CTL0 |= ADC12SC; // Start conversion __bis_SR_register(LPM4_bits + GIE); // Enter LPM4, Enable interrupts __no_operation(); // For debugger } // INTERRUPT VECTORS FOR MSP430 //////////////////////////////////////// #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__) #pragma vector=ADC12_VECTOR __interrupt void ADC12ISR (void) #elif defined(__GNUC__) void __attribute__ ((interrupt(ADC12_VECTOR))) ADC12ISR (void) #else #error Compiler not supported! #endif { switch(__even_in_range(ADC12IV,34)) { case 0: break; // Vector 0: No interrupt case 2: break; // Vector 2: ADC overflow case 4: break; // Vector 4: ADC timing overflow case 6: break; // Vector 6: ADC12IFG0 case 8: break; // Vector 8: ADC12IFG1 case 10: break; // Vector 10: ADC12IFG2 case 12: break; // Vector 12: ADC12IFG3 case 14: break; // Vector 14: ADC12IFG4 case 16: break; // Vector 16: ADC12IFG5 case 18: break; // Vector 18: ADC12IFG6 case 20: // Vector 20: ADC12IFG7 PBOUT = ADC12MEM7; case 22: break; // Vector 22: ADC12IFG8 case 24: break; // Vector 24: ADC12IFG9 case 26: break; // Vector 26: ADC12IFG10 case 28: break; // Vector 28: ADC12IFG11 case 30: break; // Vector 30: ADC12IFG12 case 32: break; // Vector 32: ADC12IFG13 case 34: break; // Vector 34: ADC12IFG14 default: break; } }
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