Now it is working. The key change was the remove of clearing the interrupt flags. I have tested the transfers with 400 kHz I²C clock. Now I want to change the handling of the RX/TX counters as you have proposed. The problem here is, that I get two interrupts for the start condition and one for the stop condition. I would expect only one interrupt for the start condition at the begin of the transfer (5 x RX + 3 x TX). The second start condition interrupt is triggered just before the first TX interrupt is triggered.
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