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Forum Post: RE: MSP430 I2C slave holding clock line low

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Hi Brian, Thank you for the detailed description, I have a few recommendations: 1. Larger pull-up values (4.7 or 10 kOhm), reduce the I2C clock to 100 kHz if not used already. 2. Clear both transmit and receive interrupt flags in SetUpRx/Tx, and disable the interrupt you are not currently using. 3. Do not initialize the start interrupt if you are not using it in your ISR, you don't have to re-enable the stop interrupt each time. 4. Shorten DecodeRx and run through SetUpTx as quickly as possible (either disable/re-enable the USCI module in each or don't bother re-enabling it every time). 5. Try increasing your DCO/MCLK frequency to lower instruction time. The fact that the code works so long before breaking leads me to believe that there is a race condition involved that is trapping the USCI in an unknown state, you will need to debug the system further before we can know for sure. Regards, Ryan

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