What Alexey said, plus: If "framing" is intended to mean "the transaction length supported by the Master-side automated-/CS" (see also: UCSTEM), why limit to 8/16-bits? I've seen very few SPI slaves that really want /CS to wiggle on every (8/16-bit) word, so in my world the Master automated-/CS is mostly useless , and /CS has to be done in software. Most SPI slaves want /CS to frame a whole transaction, which might be 1 or 514 bytes. Why not have instead (a) a transaction-length setting (as seen in the eUSCI I2C) or (b) an end-of-transaction indicator (as seen in the [pardon the expression] LPC824 series)? Oh yeah, and: Second the motion for FIFOs.
↧