There is no separate stack for ISR. When a IRQ is trigged, hardware itself will put two 16bit values on the stack. The PC (program counter), that is the location "main" code was just about to execute. And the SR (Status register), that holds sleep-mode and c/z/n flags. C compiler will put more on the stack if it needs to use the registers for temporary vars. So it will insert push/pop code as needed, this is one reason your ISR should be light and lean as to much stack use slows down response. A exit of a ISR it will in hardware put SR and PC back to its regular values. A exit from sleep-mode can be done here by a "trick", modifying the LPM-bits in SR value that is on the stack, that hardware will then put back on exit.
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