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Forum Post: RE: msp432 SPI clock speed

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[quote user="Chris Sterzik"]Eric, I am asking for confirmation, but I believe that the 16Mhz is related to the note 1 found in table 5-38. The f(ucxclk) is actual SPI clock while the f(eusci) is the clock into the peripheral. www.ti.com/.../msp432p401r.pdf Regards, Chris [/quote] thanks for looking into this. I looked at table 5-38 and have to say clear as mud. Not sure why this is so difficult to figure out. Probably because it depends a how everything is hooked up. f_ucxclk = 1/2 t_lo/hi where t_lo/hi = max(t_valid,mo(eusci) + t_su,si(slave), t_su,mi(eusci) + t_valid,so(slave)) now assuming we are attaching this master to an on board slave that is the same animal... t_valid,mo(eusci) = 14ns (1.62V) t_su,si(slave) = 3ns t_su,mi(eusci) = 45ns (1.62V) t_valid,so(slave) = 35ns t_valid,mo(eusci) + t_su,si(slave) = 17ns, t_su,mi(eusci) + t_valid,so(slave) = 80ns so t_lo/hi = 80ns I'm pretty sure f_ucxclk should be written as 1/(2 * t_lo/hi) so this yields 1/160ns -> 6.25 MHz. If we go with 1/(1/2 t_lo/hi) we get 1/40ns -> 25MHz So I'm not at all confident of the f_ucxclk = 1/2 t_lo/hi equation. That doesn't make sense to me. f = 1 / t where t is the period. so I'm still not sure where the 16 MHz comes from. also on page 83, table 5-39, note (1): It says: notice the end of the sentence? It says see the SPI parameters of the attached slave. That should be master.

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