Hi Soonyoung, First, make sure your UART pins are connected correctly (MSP430 TX -> BT module RX; BT module TX -> MSP430 RX). I've made some changes to your code and attached it below. Please note that it's for your reference, and I haven't tested it. I added an array that can be checked to determine whether you're actually receiving data from the BT module. Since the default DCO frequency for SMCLK is 1048576 Hz and not 1000000 Hz, I changed UCA1BR0 to 109, since 1048576/9600 = ~109.2, and UCBRS_1 to UCBRS_2 for UCA1MCTL. Table 36-4 and 36-5 in the User's Guide have helpful pre-calculated values for different clock and baud settings. #include unsigned int rx_buffer[256]; unsigned int bufferIndex = 0; int main(void) { WDTCTL = WDTPW + WDTHOLD; // Stop WDT // P4DIR |= BIT4+BIT5; P6DIR |= 0x01; P4SEL |= BIT4+BIT5; // P4.4,4.5 = USCI_A0 TXD/RXD UCA1CTL1 |= UCSWRST; // **Put state machine in reset** UCA1CTL1 |= UCSSEL_2; // SMCLK = 1048576 Hz UCA1BR0 = 109; // Baud rate divider = 1048576/9600 = ~109.2 UCA1BR1 = 0; // 1048576 Hz 9600 UCA1MCTL |= UCBRS_2 + UCBRF_0; // Modulation UCBRSx=2, UCBRFx=0 UCA1CTL1 &= ~UCSWRST; // **Initialize USCI state machine** UCA1IE |= UCRXIE + UCTXIE; // Enable USCI_A0 RX interrupt __bis_SR_register(LPM0_bits + GIE); // Enter LPM0, interrupts enabled __no_operation(); // For debugger } // Echo back RXed character, confirm TX buffer is ready first #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__) #pragma vector=USCI_A1_VECTOR __interrupt void USCI_A1_ISR(void) #elif defined(__GNUC__) void __attribute__ ((interrupt(USCI_A1_VECTOR))) USCI_A1_ISR (void) #else #error Compiler not supported! #endif { switch(__even_in_range(UCA1IV,4)) { case 0:break; // Vector 0 - no interrupt case 2: // Vector 2 - RXIFG while (!(UCA1IFG&UCTXIFG)); // USCI_A0 TX buffer ready? rx_buffer[bufferIndex] = UCA1RXBUF; bufferIndex++; UCA1TXBUF = UCA1RXBUF; // TX -> RXed character break; case 4:break; // Vector 4 - TXIFG default: break; } } Hope this helps. Regards, James MSP Customer Applications
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