Part Number: MSP432P401R According to the latest msp432 Technical Reference Manual (slau356E, Dec 2016) on page 468, section 9.2.5 however, I've been working with the example dma code (using the rom based driverlib), version 3.50.0.2, dma/dma_eusci_spi_loopback/dma_eusci_spi_loopback.c. this program starts out with TXBUF being empty which means TXIFG is up (this is on the master SPI, B0). Nothing special is done with TXIFG. Rather, DMA channel 0 is simply enabled and off to the races we go... That's a level, no edge involved. Can you please talk to the design folks and let me know if I'm not understanding something properly. thanks, eric
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