Nitesh, You need to first set the UCB0CTL1 bit 0 to 1 before making any change to UCB0CTLx UCB0CTL1 |= UCSWRST UCB0CTL0 |= UCMST+UCSYNC+UCMSB; UCB0CTL1 |= UCSSEL__ACLK; // ACLK UCB0BR0 = 24; // 1 MHz UCB0BR1 = 0; // UCB0CTL1 &= ~UCSWRST You need to add the two lines highlighted in green. If the UCB0TL1 bit 0 is not set to 1 the changes can not be made and hence the change would not be registered and this bit after the change the bit needs to be set back to 0. What is the clock source for the ADS1292 , internal or external, if external then @ what speed, While writing the registers there is a limit on SCLK speed but @1MHz the SCLK speed should be ok for register read/Write even if you consider 512 kHz for the internl clock. Moreover the MCLK speed is 4 MHz or 24 MHz, is the @4MHz a typo or you want to say the system runs at 4 MHz, "System runs @4Mhz and i am using ACLK for SPI," In case the system speed is 24MHz then the ACLK with the divisor as 24 would run at 1 MHz. Regards Viney Chaddha
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