[quote user="Clemens Ladisch"]It might be a good idea to try a test program that uses RAM-based interrupt vectors (without flashing) first.[/quote]The previous description of my test program was vague. The program does the following: Place a timer interrupt handler in RAM using the TI compiler / linker support for RAM functions. Enable DMA which is triggered by a timer to perform a regular transfer from a test pattern in RAM to P1OUT. Copy the interrupt vectors from flash to RAM and set the SYSRIVECT bit to remap the interrupt vectors to RAM. Enable the timer interrupt. Make the CPU wait in a loop for several tens of seconds, to check that the RAM based timer interrupt is handled the expected number of times. Using code placed in RAM erase the FLASH2 sectors one at a time. Using code placed in RAM program the FLASH2 sectors with a test pattern, one sector at a time. Using code placed in RAM verify the test pattern which has been written to FLASH2. The crash was only observed during step 7, which indicates the RAM-base interrupt vector had been working successfully up until the flash programming was in-progress. The number of sectors which had been programmed before the crash varied from run-to-run, for reasons I didn't understand. Therefore, think the RAM-based interrupt vectors by themselves are OK.
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