Hi everyone, I finally load new program in my 5438a device by bsl with MCLK set as 24MHz. I think the key point is like what Clemens Ladisch suggest, before configuring MCLK to 24MHz, I must first increase core voltage to make sure CPU have sufficient voltage to support it. So after referring example code of increasing core voltage, i increase core voltage to highest level before setting MCLK to 24MHz, and the code is shown as following: void SetVCoreUp (unsigned int level) { for(unsigned int i = 1; i < level + 1; i++) { // Open PMM registers for write access PMMCTL0_H = 0xA5; // Make sure no flags are set for iterative sequences while ((PMMIFG & SVSMHDLYIFG) == 1); while ((PMMIFG & SVSMLDLYIFG) == 1); // Set SVS/SVM high side new level SVSMHCTL = SVSHE + SVSHRVL0 * i + SVMHE + SVSMHRRL0 * i; // Set SVM low side to new level SVSMLCTL = SVSLE + SVMLE + SVSMLRRL0 * i; // Wait till SVM is settled while ((PMMIFG & SVSMLDLYIFG) == 1); // Clear already set flags PMMIFG &= ~(SVMLVLRIFG + SVMLIFG); // Set VCore to new level PMMCTL0_L = PMMCOREV0 * i; // Wait till new level reached if ((PMMIFG & SVMLIFG)) while ((PMMIFG & SVMLVLRIFG) == 1); // Set SVS/SVM low side to new level SVSMLCTL = SVSLE + SVSLRVL0 * i + SVMLE + SVSMLRRL0 * i; // Lock PMM registers for write access PMMCTL0_H = 0x00; } } Thanks Clemens Ladisch and zrno soli ! I really appreciate your reply and suggestions because i didn't find this key point by myself for almost one week!
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