You can use DMA for measurement part too - so both DAC and ADC is running without CPU intervention. DMA does not halt CPU (!!!), It does stop bus briefly. If we assume that each DMA transfer takes 2 cycles to read or write data, then from CPU running at 16MHz, two DMA transfers which are scheduled at 7200 transfers/sec, will "steal" (7200*2)*2 = 28800 cycles each second. It means CPU will barely notice it, will run at average 15.9 million cycles/sec. Disclaimer: this is only to show idea. You shall calculate actual cycle count yourself, by reading User' s Guide of the processor.
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