I found this code for your reference. Your target hardware must include working 32768 Hz crystal. ;******************************************************************************* ; Code for application report - "DCO Library" ;******************************************************************************* ; THIS PROGRAM IS PROVIDED "AS IS". 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To protect TI's ; rights in the Program, you agree not to decompile, reverse ; engineer, disassemble or otherwise translate any object code ; versions of the Program to a human-readable form. You agree ; that in no event will you alter, remove or destroy any ; copyright notice included in the Program. TI reserves all ; rights not specifically granted under this license. Except ; as specifically provided herein, nothing in this agreement ; shall be construed as conferring by implication, estoppel, ; or otherwise, upon you, any license or other right under any ; TI patents, copyrights or trade secrets. ; ; You may not use the Program in non-TI devices. ; ;******************************************************************************* ; DCO Library ; ; Description; Allows the DCO to be calibrated to a multiple of ACLK ; ; ; Memory Usage: MODULE DCO_Library ;Functions PUBLIC TI_SetDCO RSEG CODE ; Code is relocatable EVEN #ifndef TACCTL2_ ; For Timer_A2 devices #define TACCTL2 TACCTL0 #define TACCR2 TACCR0 #endif ;------------------------------------------------------------------------------- TI_SetDCO; Subroutine: Sets DCO to selected frequency based on Delta. ; R14 and R15 are used, ACLK = 32768/8 Timer_A clocked by DCOCLK ; R13 used to hold old BCSCTL1 value ; R12 is the parameter specifying the delta value, MCLK = delta * 4096 ; returns in R12: ; 0 - DCO Set Correctly ; 1 - DCO running at slowest setting ; 2 - DCO running at fastest setting ; 0xff - Timeout Occured while setting DCO ;------------------------------------------------------------------------------- push.w r11 ; save loop counter push.w r10 push.w &TACTL push.w &TACCTL2 mov.w #10000, r11 ; max number of times to loop clr.w r15 ; mov.b &BCSCTL1, r13 ; Copy BC settings to preserve #ifndef __MSP430_HAS_BC2__ and.w #0xF8, r13 ; Mask out bits which will change (0-2) 1xx #else and.w #0xF0, r13 ; Mask out bits which will change (0-3) 2xx #endif SetupBC bis.b #XT2OFF+DIVA_3,&BCSCTL1 ; ACLK=LFXT1CLK/8, XT2OFF to make a known state SetupCC2 mov.w #CM_1+CCIS_1+CAP,&TACCTL2 ; CAP, ACLK mov.w #TASSEL_2+MC_2+TACLR, &TACTL; SMCLK, cont-mode, clear firstTest bit.w #CCIFG,&TACCTL2 ; Test capture flag, skip first short ACLK to avoid error jz firstTest ; bic.w #CCIFG,&TACCTL2 ; Clear capture flag TestDCO dec.w r11 jz ExitTimeOutError ; TestDCO2 bit.w #CCIFG,&TACCTL2 ; Test capture flag jz TestDCO2 ; bic.w #CCIFG,&TACCTL2 ; Clear capture flag ; AdjDCO mov.w &TACCR2,r14 ; R14 = captured SMCLK sub.w r15,r14 ; R14 = capture difference mov.w &TACCR2,r15 ; R15 = captured SMCLK mov.w r14, r10 ; r10 = capture difference sub.w r12, r10 ; r10 = difference between desired and actual jz ExitNoError ; if r12 = r10, DCO set exactly cmp.w #0xFFFF, r10 ; DCO can be off by 1 for a tolerance jeq ExitNoError cmp.w r12, r14 ; Delta = SMCLK/(32768/8) jlo IncDCO ; DecDCO dec.b &DCOCTL ; Slow DCO with DCO and MOD jc TestDCO ; Slower? #ifndef __MSP430_HAS_BC2__ bit.b #0x7, &BCSCTL1 ; Can RSEL.x be decremented? 1xx #else bit.b #0xF, &BCSCTL1 ; Can RSEL.x be decremented? 2xx #endif jz ExitSlowestSetting ; jmp>DCO at slowest setting dec.b &BCSCTL1 ; Decrement RSEL.x jmp TestDCO ; IncDCO #ifndef __MSP430_HAS_BC2__ inc.b &DCOCTL ; Speed DCO with DCO and MOD jnc TestDCO ; Faster? cmp.b #XT2OFF+DIVA_3+0x7, &BCSCTL1 ; Can RSEL.x be increased? 1xx jeq ExitFastestSetting ; jmp> DCO at fastest setting inc.b &BCSCTL1 ; Increment RSEL.x jmp TestDCO ; #else inc.b &DCOCTL ; Speed DCO with DCO and MOD jnc TestFor16MHz cmp.b #XT2OFF+DIVA_3+0xF, &BCSCTL1 ; Can RSEL.x be increased? 2xx jeq ExitFastestSetting ; jmp> DCO at fastest setting inc.b &BCSCTL1 ; Increment RSEL.x jmp TestDCO ; ;-------Compare to built in values TestFor16MHz cmp.b &CALDCO_16MHZ, &DCOCTL ; compare current DCO to built in DCO constants jne TestDCO ; if they are not equal, leave mov.b &CALBC1_16MHZ, r14 ; move cal values into R14 for manipulation bis.b #XT2OFF+DIVA_3, r14 ; make sure BCSCTL1 cal has same state cmp.b r14, &BCSCTL1 ; if they are the same jeq ExitFastestSetting2xx ; leave all values in place and exit jmp TestDCO ;-------Compare to built in values #endif ExitSlowestSetting clr.b &DCOCTL mov.w #0x01, r12 jmp SetDCO_Exit ExitFastestSetting mov.b #0xFF, &DCOCTL ; since the DCO previously rolled over ExitFastestSetting2xx mov.w #0x02, r12 jmp SetDCO_Exit ExitTimeOutError mov.w #0xff, r12 jmp SetDCO_Exit ExitNoError clr.w r12 SetDCO_Exit clr.w &TACCTL2 ; Stop CCR2 #ifndef __MSP430_HAS_BC2__ bic.b #0xF8, &BCSCTL1 ; Mask out bits which will change (0-2) 1xx #else bic.b #0xF0, &BCSCTL1 ; Mask out bits which will change (0-3) 2xx #endif bis.b r13, &BCSCTL1 ; copy in old non-DCO BC settings pop.w &TACTL pop.w &TACCTL2 pop.w r10 pop.w r11 ret ; Return from subroutine ; END
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