This is how unbuffered SAR ADC of msp430 works. Try to measure input voltage which is equal to VREF and you will see different kind of sawtooth. Sample capacitor have some residual charge after previous conversion. Voltage of ADC sample capacitor depends on voltage sampled at previous conversion, but usually it tends to reach VREF/2. This explains sawtooth when you sample voltages below VREF/2. This also explains why there's chapter in ADC documentation "sample time considerations". By reading particular chapter you also will understand why sawtooth decrease when you decrease impedance of ADC input circuit - in such case sampling capacitor reach input voltage faster,
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