Hello Akash! First, thank you for providing a very detailed scope shot and circuit. During sample time, an internal switch allows the input capacitance to be charged, which is reflected in the sawtooth wave. The required time to fully charge up the capacitor is dependent on the external analog front-end (AFE) connected to the ADC input pin. However, the sample time is directly impacted by the source resistance. As you observed, using higher-resistance resistors increases the required sample time. With the lower-resistance resistors, the input current is higher and thus charges up the input capacitor more quickly. Take a look at Section 2.2 Selecting the Right Sample-and-Hold Time (SHT) in the Designing With MSP430FR58xx/FR59xx/68xx/69xx ADC app note. It shows an analog input equivalent circuit model (including source resistance and source voltage) and also an example calculation of the minimum sample time. For the input capacitance and resistance, refer to Table 5-22 in the datasheet . Hope this helps! Regards, James MSP Customer Applications
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