Blindly changing UCCKPL and UCCKPH is not helpful; there is only one correct setting, and you have to understand which one it is. If in doubt, check with a logic analyzer. Section 7.3.1 of the ADC128S022 datasheet says: While a conversion is in progress, the address of the next input for conversion is clocked into a control register through the DIN pin on the first 8 rising edges of SCLK after the fall of CS. (How would it be possible for the ADC to start conversion when it doesn't yet know which input to use?)
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