Part Number: MSP432P401R The following throws an unaligned trap when used with Port 2 (and others). The reason is HWREG16 forces a ldrh instruction to be used which will fail if one has unaligned traps turned on. Also accessing an unaligned with ldrh can cause extra bus cycles on the memory bus (depends on the memory system design). I know someone is going to say, turn unaligned traps off. Yes that would solve this particular problem. So let's talk about why one would want unaligned traps on. The msp432 is a risc machine with a finely turned memory system that is optimized for a load/store architecture. In general one strives for aligned accesses because there is a performance penalty when unaligned. So one turns on the unaligned trap to identify mistakes. The driverlib as currently written causes alignement traps. So if one is using the lib then one can't turn on alignement traps. yes, i realize it is probably too late to do anyting about this, since driverlib is burned into ROM. But I felt I should bring this to your attention anyway so that the mistake isn't repeated. This is a result first how the registers are laid out. The next error is how the registers are being accessed, in particular forcing all register accesses to be 16 bits even with unaligned by use of the HWREG16 macro. You can work around the architectural problem (the register definitions) by using the structure definitions. But to use those you have to figure out if the register is odd or even (the type) and then accessing it via that pointer. This will take care of generating the correct instruction to avoid the unaligned trap and any performance penalty. The weird even odd type stuff is a direct result of how weirdly the ports are layed out. (Yes, I understand the original motivation, and it did seem like the thing to do at the time, but it really is a mistake). void GPIO_setAsInputPinWithPullDownResistor(uint_fast8_t selectedPort, uint_fast16_t selectedPins) { uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort]; HWREG16(baseAddress + OFS_LIB_PASEL0) &= ~selectedPins; HWREG16(baseAddress + OFS_LIB_PASEL1) &= ~selectedPins; HWREG16(baseAddress + OFS_LIB_PADIR) &= ~selectedPins; HWREG16(baseAddress + OFS_LIB_PAREN) |= selectedPins; HWREG16(baseAddress + OFS_LIB_PAOUT) &= ~selectedPins; }
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