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Forum Post: RE: MSP430G2553 , BCS+ and Low Power Mode

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As long as the CPUOFF bit is set, no code is executed. When an interrupt happens, the CPU automatically clears the CPUOFF bit. (But the old SR value is saved on the stack, and restored when the interrupt exits.) The interrupt handler can clear the CPUOFF bit in the saved SR value on the stack, which will keep the CPU running after the interrupt. This is typcially used when the main loop wants to wait for the interrupt. Calling "__bis_SR_register(CPUOFF)" inside an interrupt handler is wrong, because this would make the CPU go to sleep immediately, and as long as an interrupt handler is active, no other interrupts can be raised.

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