Hi, I am using MSP430FR5949 (master Mode) to read the temperature data from IC ADT7420. However, ADT7420 sent back a not acknowledge bit to master after the serial bus address byte was transmitted. It is because the master received NACK, so it repeated to transmit the address byte again and again. the address byte is 0x48 because A0 and A1 connected to ground. The frequency of each clock was 100Hz. SCL, SDA rise and fall time was 0.26us. This is the testing result. The schematic is shown below: My code is: #include const unsigned char ADT7420_SlaveAddress = 0x48; unsigned int RxTempBuf; unsigned char TXByteCtr; unsigned char TxTempBuff; unsigned char Is_Rxmode = 0; unsigned char Is_Init_success = 0; int main(void) { WDTCTL = WDTPW | WDTHOLD; // Stop watchdog timer P1SEL1 = BIT6 | BIT7; // I2C pins - P1.6 SDA, P1.7 SCL PM5CTL0 &= ~LOCKLPM5; // Disable the GPIO power-on default high-impedance mode to activate UCB0CTLW0 |= UCSWRST; // Software reset enabled CSCTL0_H = CSKEY >> 8; CSCTL1 = DCOFSEL_6; // Set DCO to 8MHz CSCTL2 = SELS__DCOCLK; // set SCLK = DCO //I2C Setup UCB0CTLW0 |= UCMODE_3 | UCMST | UCSSEL__SMCLK; // I2C master mode, SMCLK, Software reset enabled UCB0CTLW1 |= UCASTP_2; // Automatic stop generated UCB0BRW = 0x2710; // fSCL = SMCLK/10000 = ~100Hz; ADT7420 maximun clock frequency = 400kHz UCB0I2CSA = ADT7420_SlaveAddress; // configure slave address UCB0TBCNT = 0x0008; // number of bytes to be received UCB0CTLW0 &= ~UCSWRST; // clear reset register UCB0IE |= UCTXIE0 |UCRXIE0 | UCNACKIE; // transmit and NACK interrupt enable TxTempBuff = 0x0B; Is_Rxmode = 1; while(UCB0CTLW0 & UCTXSTP); // Ensure stop condition sent UCB0CTLW0 |= UCTR | UCTXSTT; // I2C TX, start condition __bis_SR_register(LPM0_bits | GIE); while(Is_Rxmode == 1); Is_Rxmode = 1; UCB0CTLW0 &= ~UCTR; UCB0CTLW0 |= UCTXSTT; while(Is_Rxmode == 1); if(RxTempBuf != 0xCB) { UCB0CTLW0 |= UCTR |UCTXSTT; Is_Init_success = 0; } __no_operation(); return 0; } // I2C Interrupt Vector handler #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__) #pragma vector = USCI_B0_VECTOR __interrupt void USCI_B0_ISR(void) #elif defined(__GNUC__) void __attribute__ ((interrupt(USCI_B0_VECTOR))) USCI_B0_ISR (void) #else #error Compiler not supported! #endif { switch(__even_in_range(UCB0IV, USCI_I2C_UCBIT9IFG)) { case USCI_NONE: break; // Vector 0: No interrupts case USCI_I2C_UCALIFG: break; // Vector 2: ALIFG case USCI_I2C_UCNACKIFG: // Vector 4: NACKIFG UCB0CTLW0 |= UCTXSTT; // resend start if NACK break; case USCI_I2C_UCSTTIFG: break; // Vector 6: STTIFG case USCI_I2C_UCSTPIFG: break; // Vector 8: STPIFG case USCI_I2C_UCRXIFG3: break; // Vector 10: RXIFG3 case USCI_I2C_UCTXIFG3: break; // Vector 12: TXIFG3 case USCI_I2C_UCRXIFG2: break; // Vector 14: RXIFG2 case USCI_I2C_UCTXIFG2: break; // Vector 16: TXIFG2 case USCI_I2C_UCRXIFG1: break; // Vector 18: RXIFG1 case USCI_I2C_UCTXIFG1: break; // Vector 20: TXIFG1 case USCI_I2C_UCRXIFG0: // Vector 22: RXIFG0 { RxTempBuf = UCB0RXBUF; Is_Rxmode = 0; __bic_SR_register_on_exit(LPM0_bits); // Exit LPM0 } break; case USCI_I2C_UCTXIFG0: // Vector 24: TXIFG0 { if(Is_Rxmode == 1) { UCB0TXBUF = TxTempBuff; Is_Rxmode = 0; __bic_SR_register_on_exit(LPM0_bits); // Exit LPM0 } else { if (TXByteCtr) // Check TX byte counter { TXByteCtr--; // Decrement TX byte counter UCB0TXBUF = TxTempBuff[TXByteCtr]; // Load TX buffer } else { UCB0CTLW0 |= UCTXSTP; // I2C stop condition UCB0IFG &= ~UCTXIFG; // Clear USCI_B0 TX int flag __bic_SR_register_on_exit(LPM0_bits); // Exit LPM0 } } } break; default: break; } }
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