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Forum Post: RE: MSP430FR5739 CPU clock for SPI question

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The MSP430FR5739 Device Erratasheet ( SLAZ392 ) says: USCI41 Function UCBUSY bit of eUSCIA module stuck to 1 when device is in SPI mode. Description When eUSCIA is configured in SPI mode, and the last transfer bit changes from 0 to 1, the UCBUSY bit gets stuck to 1. This happens in all four combinations of Clock Phase and Clock Polarity options (UCAxCTLW0.UCCKPH & UCAxCTLW0.UCCKPL bits). There is no data loss or corruption. Workaround Check on transmit or receive interrupt flag UCTXIFG/UCRXIFG instead of UCBUSY to know if the UCAxTXBUF buffer is empty or ready for the next complete character.

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