Forum Post: MSP432 DMA ISE Latency using TimerA1
Hi, I was setting up a little test, where the dma uses the TimerA1 as Trigger. The idea is that the timer generates an output CLK (PMAP P7.0 to TA1.3) and also Triggers the DMA (TA1.2 = Channel 3) that...
View ArticleForum Post: RE: MSP430FR5739 CPU clock for SPI question
The MSP430FR5739 Device Erratasheet ( SLAZ392 ) says: USCI41 Function UCBUSY bit of eUSCIA module stuck to 1 when device is in SPI mode. Description When eUSCIA is configured in SPI mode, and the last...
View ArticleForum Post: RE: MSP430F5659 on MSP-TS430PZ100USB
I have the source code for 4MHz to 20MHz complete initialisation src code for MSP-TS430PZ100UB with MSP430F5659 . With the help of IQD Crystals it will work and has been tested at 4,6,8,12,16,20MHz...
View ArticleForum Post: RE: Problems to use DMA with SPI
There is something wrong in your circuit (which you have not shown).
View ArticleForum Post: RE: Problems to use DMA with SPI
That scope trace is strange. Please post the schematic showing how your master and slave are connected together.
View ArticleForum Post: RE: USB BSL invoke fails in Release Mode
Hi Ryan, As you told we are able to access the BSL and load the code. Thanks for the help. Nitesh
View ArticleForum Post: Hardware checksum for MSP430fr5969
Hi, I have one application output file say update.txt and it has starting data as, @5800 5C 52 @5805 FF 01 00 1A 5F FE 5C 0B 5D 01 00 00 00 19 50 05 00 01 00 1A 5F 0C 5D 0B 5D 00 00 00 00 19 50 06 I...
View ArticleForum Post: RE: Generating Sine Wave Signal from MSP430
Thank you for your reply. Previously I generate PWM but this is not seems like a pwm accurately. I think the cause of problem is filter but I have no idea which filter is available. Iam very confused....
View ArticleForum Post: RE: USB CDC com port name change
The descriptors.c file contains the strings that the device reports to the OS. However, many drivers do not bother to show these strings. The TI USB stack already implements a serial number.
View ArticleForum Post: RE: Why isn't the linker option of automatically splitting into...
[quote user="A S"]While it is obvious that the code size cannot fit into either flash section separately, shouldn't my syntax of the .cmd file automatically split the .text code segment between the two...
View ArticleForum Post: Unable to debug
I had mentioned this problem in a previous post ( https://e2e.ti.com/support/microcontrollers/msp430/f/166/t/544407 I am unable to debug and burn the code into MSP432 . It gives me the following error...
View ArticleForum Post: RE: Write to I/O pin in fewest number of clock cycles
[quote user="A S"]Thank you for replying. 2. What frequency do you require these pulses to be? 10 MHz, if it truly is 1 bit per cycle 4. What is the frequency you are running the CPU at? 33.3333 MHz...
View ArticleForum Post: RE: How to blow fuse MSP430F2001 / MSP430F2011
[quote user="Matthew Ray"]I was asking if there was a way to blow the fuse without using the MSP-FET or MSP-FET430UIF. [/quote] I found on web one russian, older, open, standalone software / hardware,...
View ArticleForum Post: RE: Write to I/O pin in fewest number of clock cycles
[quote user="A S"] 4. What is the frequency you are running the CPU at? 33.3333 MHz 5. What specific MSP430 device are you using? MSP430F5326 [/quote] Maximum MCLK frequency for that MCU is 25MHz, by...
View ArticleForum Post: RE: MSP-GANG-GUI 1.2.5.0 fails to program a TI Hex file to a...
[quote user="Hua Ai"] With the following procedure: Erase (memory option set to all memory) Blank Check Program the bad.txt inserted at the end of this post Verify [/quote] Why Erase / Blank Check with...
View ArticleForum Post: RE: Hardware checksum for MSP430fr5969
Attach here .txt file for CRC calculation, and I will add CRC result for MSP430 reverse and non-reverse bit order, to see if this is somehow related to IAR.
View ArticleForum Post: RE: Write to I/O pin in fewest number of clock cycles
[quote user="Robert Cowsill"] Maximum MCLK frequency for that MCU is 25MHz, by the way. [/quote] Maximum MCLK for MSP430F5510 is 25MHz, by the way, and I am running it at 48MHz, from XT2.
View ArticleForum Post: RE: Hardware checksum for MSP430fr5969
Thank you for the replay, I have checked my code by passing the some values and verified with the CRC calculator in online. i checked by as you suggested to put the seed to the next CRC calculation,...
View ArticleForum Post: RE: Hardware checksum for MSP430fr5969
@5800 5C 52 @5805 FF 01 00 1A 5F FE 5C 0B 5D 01 00 00 00 19 50 05 00 01 00 1A 5F 0C 5D 0B 5D 00 00 00 00 19 50 06 00 01 00 1A 5F 17 5D 0B 5D 00 00 00 00 19 50 07 00 02 00 1A 5F 25 5D 0B 5D 16 00 00 00...
View ArticleForum Post: RE: ezrf2500 connection problem
Please review the following E2E posts and see if any of their suggestions give you resolution: e2e.ti.com/.../112213 e2e.ti.com/.../64757 e2e.ti.com/.../16904 e2e.ti.com/.../16528 Can you confirm that...
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